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| NT511740D0J 16MEG : x4 Fast Page Mode DRAM NT511740D0J DATA SHEET REV 1.0 , JULY. 2000 1 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Contents Table of Contents .................................................................................................................................................................................... 02 Description................................................................................................................................................................................................ 03 Features.....................................................................................................................................................................................................03 Product Family ........................................................................................................................................................................................03 Pin Assignment ........................................................................................................................................................................................04 Electrical Characteristics .....................................................................................................................................................................05 Absolute Maximum Ratings ............................................................................................................................................................ 05 Recommended DC Operating Conditions ....................................................................................................................................... 05 Capacitance ................................................................................................................................................................................... 05 DC Electrical Characteristics ..........................................................................................................................................................06 AC Characteristics.................................................................................................................................................................................. 07 Timing Waveform.................................................................................................................................................................................... 10 Read Cycle ..................................................................................................................................................................................... 10 Write Cycle (Early Write) ................................................................................................................................................................ 11 Read Modify Write Cycle ................................................................................................................................................................ 12 Fast Page Mode Read Cycle ..........................................................................................................................................................13 Fast Page Mode Write Cycle(Early Write) ......................................................................................................................................14 Fast Page Mode Modify Write Cycle ..............................................................................................................................................15 RAS -only Refresh Cycle .............................................................................................................................................................. 16 CAS -before- RAS refresh............................................................................................................................................................ 17 Hidden Refresh Read Cycle ............................................................................................................................................................ 18 Hidden Refresh Write Cycle ............................................................................................................................................................ 19 Package Dimension................................................................................................................................................................................20 REV 1.0 , JULY. 2000 2 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM DESCRIPTION This is a family of 4,194,304 x 4 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Power supply voltage (+5.0V ), refresh cycle (2K Ref), access time (-5 or -6), power consumption (Normal or Low power) and package type (SOJ) are optional features of this family. All of this family have CAS -before- RAS refresh, RAS -only refresh and Hidden refresh capabilities. Furthermore, Selfrefresh operation is available in L-version. This 4Mx4 EDO Mode DRAM family is fabricated using NANYA's advanced CMOS process to realize high bandwidth, low power consumption and high reliability. It may be used as main memory unit for microcomputer, high level computer and personal computer . FEATURES * * * * * * * * * Fast Page Mode operation . TTL(5V) compatible inputs and outputs Single +5V 10% power supply JEDEC Standard pinout CAS before RAS refresh, hidden refresh, RAS -only refresh capability Refresh : 2048 cycles / 32 ms Self-refresh capability (L-ver only) Multi-bit test mode capability Available in plastic SOJ packages PRODUCT FAMILY Family NT511740D0J - 50/5L NT511740D0J - 60/6L Access Time (Max.) tRAC 50ns 60ns tCAC 13ns 15ns tRC 90ns 110ns tPC 35ns 40ns Active Power Dissipation 605mW 550mW Voltage 5V Package 26(24)-pin SOJ REV 1.0 , JULY. 2000 3 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM PIN CONFIGURATION (TOP VIEW) NT511740D0J VCC DQ0 DQ1 W RAS NC 1 2 3 4 5 6 24 23 22 21 20 19 Vss DQ3 DQ2 CAS OE A9 A10 A0 A1 A2 A3 Vcc 7 8 9 10 11 12 18 17 16 15 14 13 A8 A7 A6 A5 A4 Vss 300mil 26(24)-pin SOJ Pin Name A0-A10 DQ0-DQ3 Vss RAS CAS W OE VCC NC Pin Function Address Inputs Data Input / Output Ground Row Address Strob Column Address Strob Read/Write Input Data Output Enable Power +5.0 V ( + 3.3V ) No Connection REV 1.0 , JULY. 2000 4 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter Voltage on Any Pin Relative to VSS Voltage on VCC Supply Relative to VSS Short Circuit Output Current Power Dissipation Operation Temperature Symbol VIN ,VOUT VCC IOS PD* Topr Rating -1.0 to +7.0 -1.0 to +7.0 50 1 0 to 70 Unit V V mA W C Storage Temperature Tstg -55 to 150 C *:Ta = 25C * Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended Operating Conditions (Voltage referenced to Vss, Ta = 0 C to 70C ) Parameter Supply Voltage Ground Input High Voltage Symbol VCC VSS VIH Min. 4.5 0 2.4 -1.0 *2 Typ. 5.0 0 - Max. 5.5 0 Vcc+1.0 0.8 *1 Unit V V V V Input Low Voltage VIL *1 : V +2.0V/20ns(5V), Pulse width is measured at Vcc cc *2 : -2.0V/20ns(5V), Pulse width is measured at Vss Capacitance ( Vcc = 5V, Ta = 25C, f = 1 MHZ ) Parameter Input Capacitance (A0 -A11) Input Capacitance ( RAS , CAS , WE , OE Output Capacitance (DQ0-DQ3) ) Symbol CIN1 CIN2 CI/O Typ. Max. 5 7 7 Unit pF pF pF DC Characteristics (Recommended operating conditions unless otherwise noted.) Max Parameter Input Leakage Current (Any input 0 <= VIN <= VIN+0.5V, all other input pins not under test =0 Volt) 5V Output Leakage Current (Data out is disabled, 0 <= VOUT <= VCC) Output High Voltage Level (IOH= -5mA) Output Low Voltage Level (IOL=4.2mA) Symbol II(L) IO(L) VOH VOL Min -5 -5 2.4 Max 5 5 0.4 Units uA uA V V REV 1.0 , JULY. 2000 5 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM DC CHARACTERISTICS ( Continued ) Symbol ICC1 ICC2 Power Don't care Normal L Don't care Don't care Normal L Don't care L L Speed -5 -6 Don't care -5 -6 -5 -6 Don't care -5 -6 Don't care Don't care Max 110 100 2 1 110 100 90 80 3 200 110 100 300 250 Units mA mA mA mA mA mA mA mA mA uA mA mA uA uA ICC3 ICC4 ICC5 ICC6 ICC7 ICCS ICC1* : Operating Current ( RAS and CAS cycling @ tRC =min.) ICC2 : Standby Current ( RAS = CAS = W =VIH ) ICC3* : RAS -only Refresh Current ( RAS =VIH , RAS cycling @ tRC =min.) ICC4* : Fast Page Mode Current ( RAS =VIL, CAS Address cycling @ tPC=min.) ICC5 : Standby Current ( RAS = CAS = W =VCC -0.2V) ICC6* : CAS-Before- RAS Refresh Current ( RAS , CAS cycling @ tRC =min.) ICC7 : Battery back-up current, Average power supply current, Battery back-up mode Input high voltage (VIH )=VCC-0.2V, Input low voltage (VIL)=0.2V, CAS =0.2V, DQ=Don't care, tRC =125us(2K/L-ver) , tRAS=tRASmin~300ns ICCS : Self Refresh Current ( RAS = CAS =0.2V, W = OE =A0 ~ A11=VCC-0.2V or 0.2V, DQ0 ~ DQ3=VCC-0.2V, 0.2V or open ) *Note : ICC1, ICC3, ICC4 and ICC6 are dependent on output loading and cycle rates. Specified values are obtained with the output open. ICC is specified as an average current. In ICC1, ICC3 and ICC6, address can be changed maximum once while RAS =VIL. In ICC4, address can be changed maximum once within one Fast Page Mode cycle time, tPC. REV 1.0 , JULY. 2000 6 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM AC CHARACTERISTICS (0C Ta 70C , See note 1,2) ; Test condition : VCC=5.0V 10%, VIH /VIL=2.4/0.8V, VOH /VOL=2.0/0.8V -50 Min 90 131 50 13 25 0 0 3 30 50 13 50 13 17 12 5 0 7 0 7 25 0 0 0 7 7 13 7 0 7 32 128 0 0 37 13 0 0 3 40 60 15 60 15 20 15 5 0 10 0 10 30 0 0 0 10 10 15 10 0 10 32 128 45 15 Max Min 110 155 60 15 30 -60 Max - Parameter Random read or write cycle time Read-modify-write cycle time Access time from RAS Access time from CAS Access time from column address CAS to output in Low-Z Output buffer turn-off delay Transition time (rise and fall) RAS precharge time RAS pulse width RAS hold time CAS hold time CAS pulse width RAS to CAS delay time RAS to column address delay time CAS to RAS precharge time Row address set-up time Row address hold time Column address set-up time Column address hold time Column address to RAS lead time Read command set-up time Read command hold time referenced to CAS Read command hold time referenced to RAS Write command hold time Write command pulse width Write command to RAS lead time Write command to CAS lead time Data set-up time Data hold time Refresh period (2K, Normal) Refresh period (L-ver) Write command set-up time Symbol t RC t RWC t RAC t CAC t AA t CLZ t OFF tT t RP t RAS t RSH t CSH t CAS t RCD t RAD t CRP t ASR t RAH t ASC t CAH t RAL t RCS t RCH t RRH t WCH t WP t RWL t CWL t DS t DH t REF t REF t WCS Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms ns Notes 3,4,10 3,4,5 3,10 3 6 2 4 10 8 8 9 9 7 REV 1.0 , JULY. 2000 7 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM AC CHARACTERISTICS Parameter CAS to W delay time RAS to W delay time Column address to W delay time CAS precharge to W delay time (Continued ) Symbol t CWD t RWD t AWD t CPWD t CSR t CHR t RPC t CPA t PC t PRWC t CP t RASP t RHCP t OEA t OED t OEZ t OEH t WRP t WRH t RASS t RPS t CHS 13 0 13 10 10 100 90 -50 13 35 76 7 50 30 13 15 0 15 10 10 100 110 -50 15 100k -50 Min 36 73 48 53 5 10 5 30 40 85 10 60 35 15 100k Max Min 40 85 55 60 5 10 5 35 -60 Max Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 11,12,13 11,12,13 11,12,13 6 3 Notes 7 7 7 CAS set-up time (CAS -before- RAS refresh) CAS hold time (CAS -before- RAS refresh) RAS to CAS precharge time Access time from CAS precharge Hyper Page cycle time Hyper Page read-modify-write cycle time CAS precharge time (Hyper Page cycle) RAS pulse width (Hyper Page cycle) RAS hold time from CAS precharge OE access time OE to data delay Output buffer turn off delay time from OE OE command hold time W to RAS precharge time(C-B-R refresh) W to RAS hold time(C-B-R refresh) RAS pulse width (C-B-R self refresh) RAS precharge time (C-B-R self refresh) CAS hold time (C-B-R self refresh) REV 1.0 , JULY. 2000 8 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM NOTES 1. An initial pause of 200us is required after power-up followed by any 8 RAS -only refresh or CAS -before- RAS refresh Cycles before proper device operation is achieved. 2. VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Transition times are measured between VIH (min) and VIL (max) and are assumed to be 5ns for all inputs. 3. Measured with a load equivalent to 2 TTL(5V) loads and 100pF. 4. Operation within the t RCD(max) limit insures that tRAC(max) can be met. tRCD(max) is specified as a reference point only. If tRCD is greater than the specified tRCD (max) limit, then access time is controlled exclusively by tCAC. 5. Assumes that tRCD >= tRCD(max). 6. tOFF(min) and tOEZ(max) define the time at which the output achieves the open circuit condition and is not referenced to VOH or VOL. 7. tWCS, tRWD, tCWD and tAWD are non restrictive operating parameters. They are included in the data sheet as electrical characteristics only. If tWCS >= tWCS(min), the cycle is an early write cycle and the data output will remain high impedance for the duration of the cycle. If tCWD >= tCWD(min), tRWD >= tRWD(min) and tAWD >= tAWD(min), then the cycle is a read-modify-write cycle and the data output will contain the data read from the selected address. If neither of the above conditions is satisfied, the condition of the data out is indeterminate. 8. Either tRCH or tRRH must be satisfied for a read cycle. 9. These parameters are referenced to CAS falling edge in early write cycles and to W falling edge in read-modify-write controlled write cycles. 10. Operation within the tRAD (max) limit insures that tRAD(max) can be met. tRAD(max) is specified as a reference point only. If tRAD is greater than the specified tRAD(max) limit, then access time is controlled by tAA . 11. If tRASS >= 100us, then RAS precharge time must use tRPS instead of tRP. 12. For RAS-only refresh and burst CAS -before- RAS refresh mode, 2048(2K) cycles of burst refresh must be executed within 32ms before and after self refresh, in order to meet refresh specification.. 13. For distributed CAS -before- RAS with 15.6us interval CAS -before- RAS refresh should be executed with in 15.6us immediately before and after self refresh in order to meet refresh specification. REV 1.0 , JULY. 2000 9 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Timing Waveform Read Cycle tRC RAS VIH VIL tCSH tCRP tRCD tRAS tRP tCRP tRSH tCAS tRAD tASR tRAH tASC tCAH tRAL CAS VIH VIL Address VIH VIL Row Column tRCH tRCS tRRH tAA WE VIH VIL tROH tOEA OE VIH VIL tCAC tRAC tCLZ tOEZ tOFF DQ VIL VIH Open Valid Data-out : H" or L" REV 1.0 , JULY. 2000 10 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Write Cycle ( Early Write ) tRC RAS VIH VIL tCSH tCRP tRCD tRAS tRP tCRP tRSH tCAS tRAD tASR tRAH tASC tCAH tRAL CAS VIH VIL Address VIH VIL Row Column tWCL tWCS tWCH tWP WE VIL VIH tRWL OE VIH VIL tDS tDH DQ VIH VIL Valid Data-out Open : H" or L" REV 1.0 , JULY. 2000 11 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Read Modify Write Cycle tRWC RAS VIH VIL tRAS tRP tCRP tCSH tCRP tRCD tRSH tCAS CAS VIH VIL tASR tRAH tASC tCAH Address VIH VIL Row t RAD Column tCWD tRWD tCWL tRWL tWP tAWD tRCS tOEA WE VIL VIH tAA OE VIH VIL tCAC tRAC tCLZ tOEZ tOED tOEH tDS tDH DQ VIH VIL Valid Data-out Valid Data-in : H" or L" REV 1.0 , JULY. 2000 12 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Fast Page Mode Read Cycle tRASP tRP RAS VIH VIL tPC tCRP IH CAS V VIL tRSH tCAS tCP tCAS tCRP tCP tRCD tCAS tCP tRAD tCSH tASR tRAH tASC tCAH Column tASC tCAH tASC tRAL tCAH Address VIH VIL Row tRCS Column Column tRCH tRCS tRCH tRCS tRCH WE VIL VIH tAA tCPA tAA tCPA tAA tRRH OE VIH VIL tRAC tOEA tCAC tOFF tOEZ tCLZ tOEA tCAC tOFF tOEZ tCLZ tOEA tCAC tOEZ tCLZ Valid Data-out tOFF DQ VIH VIL Valid Data-out Valid Data-out : H" or L" REV 1.0 , JULY. 2000 13 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Fast Page Mode Write Cycle ( Early Write ) tRASP tRP RAS VIH VIL tPC tCRP tRCD tCAS tCP tCAS tCP tRSH tCAS tCRP tCP CAS VIL VIH tRAD tCSH tASR VIH tRAH tASC tCAH Column tRAD tWCS tCWL tWCH tWP tWCS tASC tCAH tASC tRAL tCAH Address VIL Row Column tCWL tWCH tWP Column tCWL tRWL tWCS tWCH tWP WE VIH VIL tDS tDH tDS tDH tDS tDH DQ VIH VIL Valid Data-in Valid Data-in Valid Data-in Note : OE=H" or L" : H" or L" REV 1.0 , JULY. 2000 14 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Fast Page Mode Modify Write Cycle tRASP tRP RAS VIH VIL tCSH tRCD VIH CAS VIL tAR tRAD tRAH tASC tCPWD tCAH Column tCWL tRCS tAWD tCWD tRWD tAA tCAC VIH tRAC tOEA tOEZ tOED tOEA tOEZ tOED tCLZ Out In Out In tCLZ Out In tOEA tOEZ tOED tDS tDH tAA tCAC tDS tDH tAA tCAC tDS tDH tWP tAWD tCWD tASC tCAH Column tCWL tWP tAWD tCWD tASC tCPWD tRAL tCAH Column tCWL tRWL tWP tCAS tCP tPRWC tCAS tCP tRHCP tRSH tCAS tCRP tASR Address VIH VIL Row WE VIL VIH OE VIL DQ VIL VIH tCLZ : H" or L" REV 1.0 , JULY. 2000 15 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM RAS-Only Refresh Cycle tRC RAS VIH VIL tRAS tRP tRPC tCRP CAS VIH VIL tASR tRAH Address VIH VIL Row tOFF DQ V IL V IH Open : H" or L" REV 1.0 , JULY. 2000 16 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM CAS-before-RAS Refresh Cycle tRC tRP tRAS tRP VIH tRPC tCP tCSR tCHR RAS VIL CAS VIH VIL tWRP tWRH tWRP WE VIL VIH tOFF DQ VIH VIL Open : H" or L" REV 1.0 , JULY. 2000 17 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Hidden Refresh Read Cycle tRC tRAS tRP tRC tRAS tRP RAS VIH VIL tCRP tRCD tRSH tCHR CAS VIH VIL tASR tRAD tRAH tASC tCAH Address VIH VIL Row Column tRCS IH WE VIL tRAL tROH tAA tOEA tRRH V OE VIL VIH tCAC tOEZ tCLZ Valid Data-out tOFF tRAC VIH DQ VIL : H" or L" REV 1.0 , JULY. 2000 18 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Hidden Refresh Write Cycle tRC tRAS tRP tRC tRAS tRP RAS VIH VIL tCRP tRCD tRSH tCHR CAS VIH VIL tASR tRAD tRAH tASC tCAH tRAL Address VIH VIL Row Column tWCS IH WE VIL tWCH tWP tWRP tWRH V OE VIL VIH tDS VIH tDH DQ VIL Valid Data-in : H" or L" REV 1.0 , JULY. 2000 19 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM PACKAGE DIMENSION 24/26-PIN PLASTIC SOJ (300mil) 17.27 17.01 7.75 7.49 8.60 8.34 PIN #1 INDEX 0.32 0.17 3.75 3.25 2.63 TYP. SEATING 0.95 TPY 1.27 0.50 0.38 0.81 MAX 6.98 6.48 0.635 MIN MAX NOTE : All dimensions in millimeters MIN or typical where noted. REV 1.0 , JULY. 2000 20 (c) NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. |
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